# -*- mode: conf; indent-tabs-mode: t -*- # Feature CPUID function Bit Required feature #sep Leaf01EDX 11 # Sysenter/sysexit #cmov Leaf01EDX 15 # Conditional Move #clflush Leaf01EDX 19 # Cache-Line Flush #mmx Leaf01EDX 23 # Multi Media Extensions #fxsr Leaf01EDX 24 # FXSAVE instruction #sse Leaf01EDX 25 # Streaming SIMD Extensions sse2 Leaf01EDX 26 # Streaming SIMD Extensions 2 # -- everything above this line is mandatory on x86-64 -- sse3 Leaf01ECX 0 # Streaming SIMD Extensions 3 #pclmul Leaf01ECX 1 # Carryless Multiply ssse3 Leaf01ECX 9 # Supplemental Streaming SIMD Extensions 3 fma Leaf01ECX 12 # Fused Multiply-Add #cx16 Leaf01ECX 13 # Compare-Exchange 16 bytes sse4.1 Leaf01ECX 19 # Streaming SIMD Extensions 4.1 sse4.2 Leaf01ECX 20 # Streaming SIMD Extensions 4.2 movbe Leaf01ECX 22 # MOV Big Endian popcnt Leaf01ECX 23 # Population count aes Leaf01ECX 25 sse4.2 # Advenced Encryption Standard #xsave Leaf01ECX 26 # XSAVE, XGETBV instructions #osxsave Leaf01ECX 27 # XSAVE enabled by OS avx Leaf01ECX 28 # Advanced Vector Extensions f16c Leaf01ECX 29 avx # 16-bit Float Conversion rdrnd Leaf01ECX 30 # Random number generator #hypervisor Leaf01ECX 31 # Running on a hypervisor #fsgsbase Leaf07_00EBX 0 # FS/GS base access bmi Leaf07_00EBX 3 # Bit Manipulation Instructions #hle Leaf07_00EBX 4 # Hardware Lock Ellision avx2 Leaf07_00EBX 5 avx # Advanced Vector Extensions 2 bmi2 Leaf07_00EBX 8 # Bit Manipulation Instructions 2 #erms Leaf07_00EBX 9 # Enhanced REP MOVSB/STOSB #rtm Leaf07_00EBX 11 # Restricted Transactional Memory #rdt_m Leaf07_00EBX 12 # Resource Director Technology (RDT) Monitoring #mpx Leaf07_00EBX 14 # Memory Protection Extensions #rdt_a Leaf07_00EBX 12 # Resource Director Technology (RDT) Allocation avx512f Leaf07_00EBX 16 avx # AVX512 Foundation avx512dq Leaf07_00EBX 17 avx512f # AVX512 Double & Quadword rdseed Leaf07_00EBX 18 # Random number generator for seeding #adx Leaf07_00EBX 19 # Multi-Precision Add-Carry avx512ifma Leaf07_00EBX 21 avx512f # AVX512 Integer Fused Multiply-Add #clflushopt Leaf07_00EBX 23 # Cache-Fline Flush Optimized #clwb Leaf07_00EBX 24 # Cache-Line Write Back #avx512pf Leaf07_00EBX 26 avx512f # AVX512 Prefetch #avx512er Leaf07_00EBX 27 avx512f # AVX512 Exponential & Reciprocal avx512cd Leaf07_00EBX 28 avx512f # AVX512 Conflict Detection sha Leaf07_00EBX 29 # SHA-1 and SHA-256 instructions avx512bw Leaf07_00EBX 30 avx512f # AVX512 Byte & Word avx512vl Leaf07_00EBX 31 avx512f # AVX512 Vector Length avx512vbmi Leaf07_00ECX 1 avx512f # AVX512 Vector Byte Manipulation Instructions #pku Leaf07_00ECX 3 # Protection Keys for User mode #ospke Leaf07_00ECX 4 # Protection Keys Enabled by OS waitpkg Leaf07_00ECX 5 # User-Level Monitor / Wait avx512vbmi2 Leaf07_00ECX 6 avx512f # AVX512 Vector Byte Manipulation Instructions 2 shstk Leaf07_00ECX 7 # Control Flow Enforcement Technology Shadow Stack gfni Leaf07_00ECX 8 # Galois Field new instructions vaes Leaf07_00ECX 9 avx2,avx,aes # 256- and 512-bit AES #vpclmulqdq Leaf07_00ECX 10 avx # 256- and 512-bit Carryless Multiply #avx512vnni Leaf07_00ECX 11 avx512f # AVX512 Vector Neural Network Instructions avx512bitalg Leaf07_00ECX 12 avx512f # AVX512 Bit Algorithms avx512vpopcntdq Leaf07_00ECX 14 avx512f # AVX512 Population Count #la57 Leaf07_00ECX 16 # 5-level page tables #rdpid Leaf07_00ECX 22 # RDPID instruction #cldemote Leaf07_00ECX 25 # Cache Line Demotion #movdiri Leaf07_00ECX 27 # Move Direct-store Integer #movdir64b Leaf07_00ECX 28 # Move Direct-store 64 bytes #enqcmd Leaf07_00ECX 29 # Enqueue Command #pks Leaf07_00ECX 31 # Protection Keys for Supervisor mode #avx5124nniw Leaf07_00EDX 2 avx512f # AVX512 4-iteration Vector Neural Network Instructions #avx5124fmaps Leaf07_00EDX 3 avx512f # AVX512 4-iteration Fused Multiply Accumulation #fsrm Leaf07_00EDX 4 # Fast Short REP MOV #uintr Leaf07_00EDX 5 # User interrupts #avx512vp2intersect Leaf07_00EDX 8 avx512f # AVX512 Intersection computation #serialize Leaf07_00EDX 14 # SERIALIZE instruction hybrid Leaf07_00EDX 15 # Hybrid processor #tsxldtrk Leaf07_00EDX 16 # TDX (RTM) Suspend Load Address Tracking #pconfig Leaf07_00EDX 18 # Platform configuration ibt Leaf07_00EDX 20 # Control Flow Enforcement Technology Indirect Branch Tracking #amxbf16 Leaf07_00EDX 22 amxtile # AMX Tile multiplication in BFloat16 avx512fp16 Leaf07_00EDX 23 avx512f,f16c # AVX512 16-bit Floating Point #amx-tile Leaf07_00EDX 24 # Advanced Matrix Extensions Tile support #amx-int8 Leaf07_00EDX 25 amx-tile # AMX Tile multiplication for Int8 raoint Leaf07_01EAX 3 # Remote Atomic Operations, Integer #avxvnni Leaf07_01EAX 4 avx # AVX (VEX-encoded) versions of the Vector Neural Network Instructions #avx512bf16 Leaf07_01EAX 5 avx512f # AVX512 Brain Float16 cmpccxadd Leaf07_01EAX 6 # CMPccXADD instructions #zlmovsb Leaf07_01EAX 10 # Zero-length MOVSB #fsrs Leaf07_01EAX 11 # Fast Short (REP?) STOSB #fsrc Leaf07_01EAX 12 # Fast Short (REP?) CMPSB, SCASB #fred Leaf07_01EAX 17 # Flexible Return and Event Delivery #lkgs Leaf07_01EAX 18 # Load into Kernel GS #amx-fp16 Leaf07_01EAX 21 amx-tile # AMX Tile multiplication in FP16 avxifma Leaf07_01EAX 23 avx # AVX-IFMA instructions lam Leaf07_01EAX 26 # Linear Address Masking #avxvnniint8 Leaf07_01EDX 4 avx # AVX Vector Neural Network Instructions, Int8 #avxneconvert Leaf07_01EDX 5 avx # AVX Non-Exception BF16/FP16/FP32 Conversion instructions #amx-complex Leaf07_01EDX 8 amx-tile # AMX Complex Matrix multiplication #prefetchiti Leaf07_01EDX 14 # PREFETCHIT0/1 instructions #xsaveopt Leaf13_01EAX 0 # Optimized XSAVE #xsavec Leaf13_01EAX 1 # XSAVE with Compaction #xgetbv1 Leaf13_01EAX 2 # XGETBV with ECX=1 #xsaves Leaf13_01EAX 3 # XSAVE Supervisor mode #xfd Leaf13_01EAX 4 # eXtended Feature Disable MSR #lzcnt Leaf80000001hECX 5 # Leading Zero Count # XSAVE states # Source: Intel Software Development Manual, Volume 1, Chapter 13 # Source: Intel Instruction Set Extensions Manual (ed. 041), Chapter 3, "Intel AMX Instruction Set" # Grouping Value Required for xsave=X87 0x0001 # X87 and MMX state xsave=SseState 0x0002 sse # SSE: 128 bits of XMM registers xsave=Ymm_Hi128 0x0004 # AVX: high 128 bits in YMM registers xsave=Bndregs 0x0008 # Memory Protection Extensions xsave=Bndcsr 0x0010 # Memory Protection Extensions xsave=OpMask 0x0020 # AVX512: k0 through k7 xsave=Zmm_Hi256 0x0040 # AVX512: high 256 bits of ZMM0-15 xsave=Hi16_Zmm 0x0080 # AVX512: all 512 bits of ZMM16-31 xsave=PTState 0x0100 # Processor Trace xsave=PKRUState 0x0200 pku # Protection Key # ??? 0x0400 xsave=CetUState 0x0800 # CET: user mode xsave=CetSState 0x1000 # CET: supervisor mode xsave=HdcState 0x2000 # Hardware Duty Cycle xsave=UintrState 0x4000 uintr # User Interrupts # ??? 0x8000 xsave=HwpState 0x10000 # Hardware P-State xsave=Xtilecfg 0x20000 # AMX: XTILECFG register xsave=Xtiledata 0x40000 # AMX: data in the tiles xsave=AvxState SseState|Ymm_Hi128 avx,fma,avx512f xsave=MPXState Bndregs|Bndcsr mpx xsave=Avx512State AvxState|OpMask|Zmm_Hi256|Hi16_Zmm avx512f xsave=CetState CetUState|CetSState shstk xsave=AmxState Xtilecfg|Xtiledata amx-tile # Processor/arch listing below this line # Source: Intel Instruction Set Extension manual, section 1.2 # Source: GCC gcc/config/i386/i386.h, i386-c.c, i386-builtins.c # Architecture Based on New features arch=x86_64 <> sse2 # Core line arch=Core2 x86_64 sse3,ssse3,cx16 arch=NHM Core2 sse4.1,sse4.2,popcnt arch=WSM NHM arch=SNB WSM avx arch=IVB SNB f16c,rdrnd,fsgsbase arch=HSW IVB avx2,fma,bmi,bmi2,lzcnt,movbe # hle,rtm arch=BDW HSW adx,rdseed arch=BDX BDW arch=SKL BDW xsavec,xsaves arch=SKX SKL avx512f,avx512dq,avx512cd,avx512bw,avx512vl #clwb arch=CLX SKX avx512vnni arch=CPX CLX avx512bf16 arch=PLC SKX avx512ifma,avx512vbmi #sha arch=SNC PLC avx512vbmi2,gfni,vaes,vpclmulqdq,avx512vnni,avx512bitalg,avx512vpopcntdq #fsrm,rdpid arch=WLC SNC shstk,movdiri,movdir64b,ibt,keylocker # avx512vp2intersect arch=GLC WLC avx512bf16,avxvnni,cldemote,waitpkg,serialize,uintr # tsxldtrk arch=RPC GLC arch=RWC RPC prefetchiti # Atom line arch=SLM WSM rdrnd,movbe arch=GLM SLM fsgsbase,rdseed,lzcnt,xsavec,xsaves arch=TNT GLM clwb,gfni,cldemote,waitpkg,movdiri,movdir64b arch=GRT SKL avxvnni,gfni,vaes,vpclmulqdq,serialize,shstk,cldemote,movdiri,movdir64b,ibt,waitpkg,keylocker # rdpid arch=CMT GRT cmpccxadd,avxifma,avxneconvert,avxvnniint8 # Xeon Phi line #arch=KNL SKL avx512f,avx512er,avx512pf,avx512cd #arch=KNM KNL avx5124fmaps,avx5124vnniw,avx512vpopcntdq # Hybrids and other names arch=CNL PLC arch=ICL SNC arch=TGL WLC arch=ADL GRT arch=RPL GRT arch=MTL CMT arch=ARL CMT arch=LNL CMT arch=ICX SNC pconfig arch=SPR GLC pconfig,amx-tile,amx-bf16,amx-int8 arch=EMR SPR arch=GNR GLC pconfig,amx-tile,amx-bf16,amx-int8,amx-fp16,amx-complex arch=SRF CMT cmpccxadd,avxifma,avxneconvert,avxvnniint8 arch=GRR SRF raoint arch=CWF SRF # Longer names arch=Nehalem NHM # Intel Core i3/i5/i7 arch=Westmere WSM # Intel Core i3/i5/i7 arch=SandyBridge SNB # Second Generation Intel Core i3/i5/i7 arch=IvyBridge IVB # Third Generation Intel Core i3/i5/i7 arch=Haswell HSW # Fourth Generation Intel Core i3/i5/i7 arch=Broadwell BDW # Fifth Generation Intel Core i3/i5/i7 arch=Skylake SKL # Sixth Generation Intel Core i3/i5/i7 arch=Skylake-Avx512 SKX # Intel Xeon Scalable arch=CascadeLake CLX # Second Generation Intel Xeon Scalable arch=CooperLake CPX # Third Generation Intel Xeon Scalable arch=PalmCove PLC arch=CannonLake CNL # Intel Core i3-8121U arch=SunnyCove SNC arch=IceLake-Client ICL # Tenth Generation Intel Core i3/i5/i7 arch=IceLake-Server ICX # Third Generation Intel Xeon Scalable arch=WillowCove WLC arch=TigerLake TGL # Eleventh Generation Intel Core i3/i5/i7 arch=GoldenCove GLC arch=AlderLake ADL # Twelfth Generation Intel Core arch=RaptorCove RPC arch=RaptorLake RPL # Thirteenth Generation Intel Core arch=RedwoodCove RWC arch=MeteorLake MTL arch=ArrowLake ARL arch=LunarLake LNL arch=SapphireRapids SPR # Fourth Generation Intel Xeon Scalable arch=EmeraldRapids EMR # Fifth Generation Intel Xeon Scalable arch=GraniteRapids GNR arch=Silvermont SLM arch=Goldmont GLM arch=Tremont TNT arch=Gracemont GRT arch=Crestmont CMT arch=GrandRidge GRR arch=SierraForest SRF arch=ClearwaterForest CWF #arch=KnightsLanding KNL #arch=KnightsMill KNM